/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
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/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
// @(#)bregloadctl.v 1.1 4/7/92
//
module BregLoadCtl
(RomFracBregLC,
RomBSL2InFromC,
LoadOprs,
notAbortWB,
PreventSwap,
LoadFromMult,
CregInSL2SQRT,
FracBregLC, FracBregLoadEn,
InFromCregOr0);
input [`end_frac_breg_field:`start_frac_breg_field] RomFracBregLC
;
input LoadFromMult
;
input LoadOprs
;
input RomBSL2InFromC
,
notAbortWB
, PreventSwap
;
input [1:0] CregInSL2SQRT
;
output [2:0] FracBregLC
;
output FracBregLoadEn
;
output [1:0] InFromCregOr0
;
ME_TIEOFF toff (vdd
, gnd
);
// SQRT Logic
ME_AND2 ssg81 (CregInSL2SQRT[1], RomBSL2InFromC, InFromCregOr0[1]);
ME_AND2 ssg80 (CregInSL2SQRT[0], RomBSL2InFromC, InFromCregOr0[0]);
// Breg Load Control
ME_INVA iopl (LoadOprs, notLoadOprs
);
ME_AND2 alcn3 (LoadFromMult, notLoadOprs, FracBregLC[2]);
ME_AND2 alcn2 (RomFracBregLC[`u_FracBregFromFunc1], notLoadOprs, FracBregLC[1]);
ME_AND2 alcn1 (RomFracBregLC[`u_FracBregFromFunc0], notLoadOprs, FracBregLC[0]);
ME_OR4 alcne (RomFracBregLC[`u_FracBregFromFunc0],
RomFracBregLC[`u_FracBregFromFunc1],
LoadFromMult,
LoadOprs,
LoadEn
);
//ME_AND3 brme (LoadEn, notAbortWB, notPreventSwap, FracBregLoadEn);
ME_AND2 alcni (LoadEn, notAbortWB, FracBregLoadEn_p
);
ME_NMUX2B_B alcn0 (FracBregLoadEn_p, vdd, PreventSwap, FracBregLoadEn);
endmodule
This page: |
Created: | Thu Aug 19 12:01:37 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_ctl/rtl/bregloadctl.v
|