cstate_rw = `true;
end
write : begin
if ( !(bus_64) ) begin
dataout = (data_words);
end else if ( bus_64 && !(second_data_transfer) ) begin
dataout = (data_words);
dataout_63to32 = (data_words_63to32);
end else if ( bus_64 && second_data_transfer ) begin
dataout = (data_words_63to32);
end // if
cstate = data_wr;
cstate_rw = `true;
end
default begin /* null */
end
endcase
end // if
end
cmd_dly : begin
cdelay_local = cdelay_local - 1;
if ( cdelay_local === 0 ) begin
cstate = cmd_rdy;
cstate_rw = `false;
cmmd_ready = 1'b1;
back_to_back = back2back;
end else begin
cstate = cmd_dly;
cstate_rw = `false;
end // if
end
disabled : begin
if ( (wait_sync[0] && (syncin[0] === 1'b1)) ) begin
wait_sync[0] = `false;
end // if
if ( (wait_sync[1] && (syncin[1] === 1'b1)) ) begin
wait_sync[1] = `false;
end // if
if ( (wait_sync[2] && (syncin[2] === 1'b1)) ) begin
wait_sync[2] = `false;
end // if
if ( (wait_sync[3] && (syncin[3] === 1'b1)) ) begin
wait_sync[3] = `false;
end // if
if ( (wait_sync[4] && (syncin[4] === 1'b1)) ) begin
wait_sync[4] = `false;
end // if
if ( (wait_sync[5] && (syncin[5] === 1'b1)) ) begin
wait_sync[5] = `false;
end // if
if ( (wait_sync[6] && (syncin[6] === 1'b1)) ) begin
wait_sync[6] = `false;
end // if
if ( (wait_sync[7] && (syncin[7] === 1'b1)) ) begin
wait_sync[7] = `false;
end // if
if ( (enable === 1'b1) && (INP.prstnn === 1'b1) ) begin
if ( !(wait_sync[0] || wait_sync[1] || wait_sync[2] || wait_sync[3] ||
wait_sync[4] || wait_sync[5] || wait_sync[6] || wait_sync[7]) ) begin
read_write_cmd;
end // if
end // if
end
endcase
case ( cstate )
cmd_dly , disabled : begin
cmd_in_progress = 1'b0;
end
default begin
cmd_in_progress = 1'b1;
end
endcase
end // if // if pclk = '0'
end // if
end
endtask // masterbe;
task step_state_machine;
begin
// the code below generates the step signal. basically,
// anytime sdelay is non-zero, this code will assert step. as
// soon as the bus interface goes into the dr_bus and req# is
// low, then it will start counting down. when it reaches
// zero then step is deasserted for one cycle.
case ( sstate )
counting : begin
if ( (stepping === 1'b1) ) begin
step_counter = step_counter - 1;
if ( step_counter <= 0 ) begin
sstate = deasserting;
step_local = 1'b0;
end else begin
sstate = counting;
end // if
end else begin
if ( sdelay !== 0 ) begin
step_local = 1'b1;
end else begin
step_local = 1'b0;
end // if
sstate = waiting;
end // if
end
deasserting : begin
if ( sdelay !== 0 ) begin
step_local = 1'b1;
step_counter = sdelay;
end // if
sstate = waiting;
end
waiting : begin
if ( sdelay !== 0 ) begin
step_local = 1'b1;
step_counter = sdelay;
if ( stepping === 1'b1 ) begin
step_counter = step_counter - 1;
if ( step_counter <= 0 ) begin
sstate = deasserting;
step_local = 1'b0;
end else begin
sstate = counting;
end // if
end else begin
sstate = waiting;
end // if
end else begin
step_local = 1'b0;
sstate = waiting;
end // if
end
endcase
end
endtask // step_state_machine
task clkrun_maker;
begin
// if (!((msg_level<`debug_3))) begin
// $display("NOTE at %0t from %m",$time);
// $write(" \"fm clkrun_maker ");
// $display("\"");
// end
// handle pclkrunnn protocol
if ( INP.pclk_event && (INP.pclk === 1'b1) && (($time - last_clk_rising) <= max_clk_period_l) ) begin
clk_running = `true;
end else if (($time - last_clk_rising) > max_clk_period_l) begin
clk_running = `false;
end // if
// clk start protocol
if ( (INP.pclkrunnn !== 1'b0) && (INP.pclkrunnn !== 1'b1) && !(clk_running) &&
!(clk_sp) ) begin
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"fm requests clk, drives pclkrunnn '0' ");
$display("\"");
end
pclkrunnn_out(1'b0, model_times.tpr_pclk_pclkrunnn, 0 *`time_scale_multiplier);
clkrun_value = 1'b0;
clk_start_count = 0;
clk_sp = `true;
maintain_check = `true;
end else if ( INP.pclk_event && (INP.pclk === 1'b1) && (INP.pclkrunnn === 1'b0) && (clkrun_value === 1'b0) && (clk_start_count < 1) && clk_sp ) begin
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"fm ready to tristate clkrun");
$display("\"");
end
clk_start_count = clk_start_count + 1;
end else if ( INP.pclk_event && (INP.pclk === 1'b1) && (INP.pclkrunnn === 1'b0) && (clkrun_value === 1'b0) && (clk_start_count === 1) && clk_sp ) begin
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"fm drives pclkrunnn 'Z'");
$display("\"");
end
pclkrunnn_out(1'bz, model_times.tpr_pclk_pclkrunnn, 0 *`time_scale_multiplier);
clkrun_value = 1'bz;
clk_start_count = 0;
clk_sp = `false;
end // if
// maintaining clk
if ( INP.pclk_event && (INP.pclk === 1'b1) ) begin
if ( (INP.pclkrunnn === 1'b1) && (clkrun_value === 1'bz) && maintain_check && clkrun_req ) begin
maintain_start = $time;
maintain_check = `false;
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"maintain_start begins, maintain_check set to false");
$display("\"");
end
end else if ( clkrun_req && (clkrun_val_l * `time_unit < $time - maintain_start) && !(maintain_check) ) begin
maintain_start = 0 * `time_unit;
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"reset maintain_start time");
$display("\"");
end
end // if
if ( (INP.pframenn === 1'b0) ) begin // set maintain_check to true when bus active
maintain_check = `true;
end // if
if ( (pclkrunnn === 1'b1) && (clkrun_value === 1'bz) && clk_running &&
clkrun_req && (clkrun_val_l * `time_unit > $time - maintain_start) && !(clk_mp) ) begin
clk_mp = `true;
end else if ( (pclkrunnn === 1'b1) && (clkrun_value === 1'bz) && clk_running &&
clkrun_req && (clkrun_val_l * `time_unit > $time - maintain_start) && clk_mp ) begin
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"fm is maintaining clk, drives pclkrunnn '0'");
$display("\"");
end
pclkrunnn_out(1'b0, model_times.tpr_pclk_pclkrunnn, 0 *`time_scale_multiplier);
clkrun_value = 1'b0;
clk_maintain_count = 0;
end else if ( (INP.pclkrunnn === 1'b0) && (clkrun_value === 1'b0) && (clk_maintain_count < 2) && clk_mp ) begin
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"fm is maintaining clk, ready to tristate clkrun");
$display("\"");
end
clk_maintain_count = clk_maintain_count + 1;
end else if ( (INP.pclkrunnn === 1'b0) && (clkrun_value === 1'b0) && (clk_maintain_count === 2) && clk_mp ) begin
if (!((msg_level<`debug_3))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"fm is maintaining clk, drives pclkrunnn 'Z'");
$display("\"");
end
pclkrunnn_out(1'bz, model_times.tpr_pclk_pclkrunnn, 0 *`time_scale_multiplier);
clkrun_value = 1'bz;
clk_maintain_count = 0;
clk_mp = `false;
end // if
last_clk_rising = $time;
end // if
end
endtask // clkrun_maker;
task configure;
input [fm_data_in1:fm_data_in2] cmd;
begin
case ( cmd[inctype1:inctype2] )
cdelay : begin
if ( (lastcmd_same || lastcmd_back) && (cmd[invalue_int1:invalue_int2] !== 0) ) begin
cdelay_local = 0;
if (!((msg_level<`debug_2))) begin
$display("NOTE at %0t from %m",$time);
$write(" \"command parameter cdelay defaults to 0 when previous command same or back is true");
$display("\"");
end
end else begin
cdelay_local_tmp = cmd[invalue_int1:invalue_int2];
cdelay_local1 = cmd[invalue_int1:invalue_int2];
end // if
end
step : begin
sdelay = cmd[invalue_int1:invalue_int2];
end
same : begin
if ( cmd[invalue_bol] ) begin
bits[0] = 1'b1;
end else begin
bits[0] = 1'b0;
end // if
lastcmd_same = cmd[invalue_bol];
end
back : begin
if ( cmd[invalue_bol] ) begin
bits[2] = 1'b1;
end else begin
bits[2] = 1'b0;
end // if
lastcmd_back = cmd[invalue_bol];
end
mode : begin
case ( cmd[inmode1:inmode2] )
linear : begin mode_local = 2'b00;
end
wrap : begin mode_local = 2'b10;
end
default begin mode_local = 2'b11;
end
endcase
end
dual_ad : begin
if ( (cmd[invalue_vector1:invalue_vector2] !== zero_32) ) begin
addr_64 = `true;
double_addr = `true;
upper_addr = cmd[invalue_vector1:invalue_vector2];
end else begin
addr_64 = `false;
double_addr = `false;
upper_addr = 32'hxxxxxxxx;
end // if
end
pci_error : begin
pe = cmd[invalue_int1:invalue_int2];
end
x_trans : begin
x_transition_l = cmd[invalue_bol];
end
dev_id : begin
device_id_reg = cmd[invalue_vector1:invalue_vector2];
end
ven_id : begin
vendor_id_reg = cmd[invalue_vector1:invalue_vector2];
end
rev_id : begin
revision_id_reg = cmd[invalue_vector1:invalue_vector2];
end
cls_code : begin
class_code_reg = cmd[invalue_vector1:invalue_vector2];
end
c_line_size : begin
cacheline_size_reg = cmd[invalue_vector1:invalue_vector2];
end
max_clk_p : begin
max_clk_period_l = cmd[invalue_time1:invalue_time2];
end
tl : begin
timeout_limit = cmd[invalue_int1:invalue_int2];
end
rl : begin
internal_retry_limit = cmd[invalue_int1:invalue_int2];
end
cl : begin
clkrun_val_l = cmd[invalue_int1:invalue_int2];
clkrun_req = `true;
end
type1_access : begin
type1_access_l = cmd[invalue_bol];
end
default begin /* null */
end
endcase
end
endtask // configure;
task exe_wakeup_cmd;
input [fm_data_in1:fm_data_in2] cmd;
begin
wakeup_num = cmd[inwakeup_num1:inwakeup_num2];
end
endtask // exe_wakeup_cmd;
//---------------------------------------------
//---------------------------------------------
// main master model
//---------------------------------------------
//---------------------------------------------
task executer;
begin
// if (msg_level >= `debug_3) begin
// $display("NOTE at %0t from %m",$time);
// $display("executer");
// end // if
if ( (INP.pclk_event || (enable !== old_enable) || INP.pclkrunnn_event) ) begin
clkrun_maker;
end // if
if ( init_finished ) begin
if ( initialize ) begin
init_master;
initialize = `false;
end // if
if ( INP.prstnn === 1'b1 && ! first_reset ) begin
if ( INP.prstnn_event ) begin
report_master;
idle_cycles = 1;
end // if
if ( INP.pclk_event && INP.pclk === 1'b1 ) begin
if (idle_done_flag) begin
get_nxt_cmd;
idle_done_flag = `false;
end
update_timing_flags;
if ( msg_level > `warnings ) begin
trace_master;
end // if
latch_variables;
parity_checker;
parity64_maker;
parity_maker;
config;
step_state_machine;
irdy_oe_maker;
bus_machine;
dev_to_maker;
masterbe;
if ( gnc ) begin
read_write_cmd;
end // if
update_internal;
lock_state;
req_maker;
to_maker;
frame_int_maker;
frame_maker;
ad_maker;
irdy_int_maker;
irdy_maker;
own_lock_maker;
lock_data;
lock_int_maker;
lock_en_maker;
lock_maker;
command_maker;
stepping_maker;
gen_output;
// if ( curr_cmd_is_idle ) begin
if (curr_cmd[incode1 : incode2] === `idle_cmd) begin
old_enable = enable;
enable = 1'b0;
right = curr_cmd[incycles1:incycles2] - 2;
if (idle_cycles <= right ) begin
idle_cycles = idle_cycles + 1;
end else begin
// curr_cmd_is_idle = `false;
enable = 1'b1;
idle_cycles = 0;
idle_done_flag = `true;
end // if
end // if
INP.pclk_event = `false;
end // if
end else if ( INP.prstnn === 1'b0 && INP.prstnn_event ) begin
reset_master;
masterbe;
if ( first_reset ) begin
get_nxt_cmd;
first_reset = `false;
end // if
end // if
if ( ((enable !== old_enable) && enable === 1'b0 && INP.prstnn === 1'b1) ) begin
req_maker;
end // if
if ( gnc ) begin
gnc = `false;
end // if
update_internal;
end // if
end
endtask // executer;
//**--**--**--**--**--**--**--**-- Executer Declarations USER CODE END
//------------------
// EXE_USER_IMMED --
//------------------
task exe_user_immed;
input [fm_data_in1:fm_data_in2] cmd;
//**--**--**--**--**--**--**--**-- exe_user_immed USER CODE BEGIN
begin
if ( (cmd[incode1:incode2] === `configure_cmd) ) begin
configure(cmd);
end else if ( (cmd[incode1:incode2] === `wakeup_cmd) ) begin
exe_wakeup_cmd(cmd);
end // if
//**--**--**--**--**--**--**--**-- exe_user_immed USER CODE END
end
endtask // exe_user_immed;
//------------
// USER_RTE --
//------------
//contains user-portion of functionality for rte command
//called when rte command is executed by controller
task user_rte;
//**--**--**--**--**--**--**--**-- user_rte USER CODE BEGIN
begin
//**--**--**--**--**--**--**--**-- user_rte USER CODE END
end
endtask // user_rte;
//====================================--
// END EXECUTER SECTION --
//====================================--
// End FM_MAIN Process Declaration Region --
//--- FM MAIN PROCESS -----
always begin : fm_main
if ( init ) begin
CNTRL.pad <= #(0) `true;
CNTRL.pad_in <= #(0) `true;
CNTRL.r_pad_pclk <= #(0) `true;
CNTRL.pcxbenn <= #(0) `true;
CNTRL.pcxbenn_in <= #(0) `true;
CNTRL.r_pcxbenn_pclk <= #(0) `true;
CNTRL.ppar <= #(0) `true;
CNTRL.ppar_in <= #(0) `true;
CNTRL.r_ppar_pclk <= #(0) `true;
CNTRL.pframenn <= #(0) `true;
CNTRL.pframenn_in <= #(0) `true;
CNTRL.r_pframenn_pclk <= #(0) `true;
CNTRL.ptrdynn <= #(0) `true;
CNTRL.ptrdynn_in <= #(0) `true;
CNTRL.r_ptrdynn_pclk <= #(0) `true;
CNTRL.pirdynn <= #(0) `true;
CNTRL.pirdynn_in <= #(0) `true;
CNTRL.r_pirdynn_pclk <= #(0) `true;
CNTRL.pstopnn <= #(0) `true;
CNTRL.r_pstopnn_pclk <= #(0) `true;
CNTRL.pdevselnn <= #(0) `true;
CNTRL.pdevselnn_in <= #(0) `true;
CNTRL.r_pdevselnn_pclk <= #(0) `true;
CNTRL.pidsel <= #(0) `true;
CNTRL.r_pidsel_pclk <= #(0) `true;
CNTRL.preqnn <= #(0) `true;
CNTRL.preqnn_in <= #(0) `true;
CNTRL.r_preqnn_pclk <= #(0) `true;
CNTRL.pgntnn <= #(0) `true;
CNTRL.r_pgntnn_pclk <= #(0) `true;
CNTRL.pclk <= #(0) `true;
CNTRL.ck_pclk <= #(0) `true;
CNTRL.pclkrunnn <= #(0) `true;
CNTRL.pclkrunnn_in <= #(0) `true;
CNTRL.r_pclkrunnn_pclk <= #(0) `true;
CNTRL.prstnn <= #(0) `true;
CNTRL.ck_prstnn <= #(0) `true;
CNTRL.pd <= #(0) `true;
CNTRL.pd_in <= #(0) `true;
CNTRL.r_pd_pclk <= #(0) `true;
CNTRL.pbenn <= #(0) `true;
CNTRL.pbenn_in <= #(0) `true;
CNTRL.r_pbenn_pclk <= #(0) `true;
CNTRL.ppar64 <= #(0) `true;
CNTRL.ppar64_in <= #(0) `true;
CNTRL.r_ppar64_pclk <= #(0) `true;
CNTRL.preq64nn <= #(0) `true;
CNTRL.preq64nn_in <= #(0) `true;
CNTRL.r_preq64nn_pclk <= #(0) `true;
CNTRL.pack64nn <= #(0) `true;
CNTRL.r_pack64nn_pclk <= #(0) `true;
CNTRL.plocknn <= #(0) `true;
CNTRL.plocknn_in <= #(0) `true;
CNTRL.r_plocknn_pclk <= #(0) `true;
CNTRL.pperrnn <= #(0) `true;
CNTRL.pperrnn_in <= #(0) `true;
CNTRL.r_pperrnn_pclk <= #(0) `true;
CNTRL.pserrnn <= #(0) `true;
CNTRL.r_pserrnn_pclk <= #(0) `true;
CNTRL.psbonn <= #(0) `true;
CNTRL.r_psbonn_pclk <= #(0) `true;
CNTRL.psdone <= #(0) `true;
CNTRL.r_psdone_pclk <= #(0) `true;
init = `false;
end // if
receiver;
controller;
//**--**--**--**--**--**--**--**-- Executer CALL or STATEMENTS USER CODE BEGIN
executer;
//**--**--**--**--**--**--**--**-- Executer CALL or STATEMENTS USER CODE END
dispatcher;
INP.pad_old = INP.pad;
INP.pcxbenn_old = INP.pcxbenn;
INP.ppar_old = INP.ppar;
INP.pframenn_old = INP.pframenn;
INP.ptrdynn_old = INP.ptrdynn;
INP.pirdynn_old = INP.pirdynn;
INP.pstopnn_old = INP.pstopnn;
INP.pdevselnn_old = INP.pdevselnn;
INP.pidsel_old = INP.pidsel;
INP.preqnn_old = INP.preqnn;
INP.pgntnn_old = INP.pgntnn;
INP.pclk_old = INP.pclk;
INP.pclkrunnn_old = INP.pclkrunnn;
INP.prstnn_old = INP.prstnn;
INP.pd_old = INP.pd;
INP.pbenn_old = INP.pbenn;
INP.ppar64_old = INP.ppar64;
INP.preq64nn_old = INP.preq64nn;
INP.pack64nn_old = INP.pack64nn;
INP.plocknn_old = INP.plocknn;
INP.pperrnn_old = INP.pperrnn;
INP.pserrnn_old = INP.pserrnn;
INP.psbonn_old = INP.psbonn;
INP.psdone_old = INP.psdone;
@(posedge INP.pad_event or posedge INP.pcxbenn_event or posedge INP.ppar_event
or posedge INP.pframenn_event or posedge INP.ptrdynn_event or posedge INP.pirdynn_event
or posedge INP.pstopnn_event or posedge INP.pdevselnn_event or posedge INP.pidsel_event
or posedge INP.preqnn_event or posedge INP.pgntnn_event or posedge INP.pclk_event
or posedge INP.pclkrunnn_event or posedge INP.prstnn_event or posedge INP.pd_event
or posedge INP.pbenn_event or posedge INP.ppar64_event or posedge INP.preq64nn_event
or posedge INP.pack64nn_event or posedge INP.plocknn_event or posedge INP.pperrnn_event
or posedge INP.pserrnn_event or posedge INP.psbonn_event or posedge INP.psdone_event
or fm_cmd or lmcver.cb or lmcver.cb_ack
or posedge cb_initiator_id_event or posedge cb_ack_event or posedge fm_cmd_strobe_event
or posedge check_cb_ack_event);
end // fm_main
integer pat_file
;
integer dtime
;
always @(msg_level)
begin
if (msg_level === `debug_1)
begin
$timeformat(-10, 0, "00", 10);
pat_file = $fopen("pcimaster_tst.pat");
$fdisplay(pat_file," p p p p p p p p p p p p p p p p p p p p p p p S C ");
$fdisplay(pat_file," S I G C R A S S S P F T I D R P R L P A D B C Y L ");
$fdisplay(pat_file," T D N L S C E B D A R R R E E A E O E D E x N K ");
$fdisplay(pat_file," O S T K T K R O O R A D D V Q R Q C R n B C R ");
$fdisplay(pat_file," P E n n 6 R n N M Y Y S n 6 6 K R n E I U ");
$fdisplay(pat_file," n L n n 4 n n E E n n E n 4 4 n n n N N ");
$fdisplay(pat_file," n n n n n n L n n n n n ");
$fdisplay(pat_file," n n n n n ");
$fdisplay(pat_file," n ");
$fdisplay(pat_file," ");
$fdisplay(pat_file,"========================================================================================================================================== ");
wait(`false);
end
end
always @(pstopnn or pidsel or pgntnn or pclk or prstnn or pack64nn or pserrnn or psbonn or psdone or ppar or pframenn or
ptrdynn or pirdynn or pdevselnn or preqnn or ppar64 or preq64nn or plocknn or pperrnn or pad or pd or pbenn or pcxbenn or
syncin or pclkrunnn)
begin
if (msg_level === `debug_1)
begin
dtime = $time * 1000 / `time_scale_multiplier;
$fdisplay(pat_file,"%d : %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b %b",
dtime,pstopnn,pidsel,pgntnn,pclk,prstnn,pack64nn,pserrnn,psbonn,psdone,ppar,pframenn,
ptrdynn,pirdynn,pdevselnn,preqnn,ppar64,preq64nn,plocknn,pperrnn,pad,pd,pbenn,pcxbenn,
syncin,pclkrunnn);
end
else
wait(msg_level);
end
endmodule // fm
This page: |
Created: | Thu Aug 19 11:57:19 1999 |
| From: |
../../../sparc_v8/system/lmc/rtl/pcimaster_fm.v
|