/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
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/* */
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/* */
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/******************************************************************************/
// @(#)shiftrightctl.v 1.1 4/7/92
//
module ShiftRightCtl
(
LoadForInt,
AregMasterBuf_57_55,
ExpIn,
SRControl,
SROneMore,
SRToStky,
Stky8,
notStky4,
Stky2,
notStky1,
StkyExtra,
RomShForAl,
notStkyInForSR,
TopBitsIn);
input LoadForInt
;
input [2:0] AregMasterBuf_57_55
;
input [8:0] ExpIn
;
input [7:0] Stky8
; // 8 Stky bits from 8 bit stage
input [3:0] notStky4
; // 4 inv Stky bits from 4 bit stage
input [1:0] Stky2
; // 2 Stky bits from 2 bit stage
input notStky1
; // 1 inv Stky bits from 1 bit stage
input [1:0] StkyExtra
; // 2 Stky bits from extra 1 bit stage
input [3:0] SRControl
;
input SROneMore
, SRToStky
;
input RomShForAl
;
output notStkyInForSR
;
output [8:0] TopBitsIn
;
// select TopBitsIn
ME_MUX_2B_9 g69 (LoadForInt,
{AregMasterBuf_57_55[2], AregMasterBuf_57_55[2],
AregMasterBuf_57_55[2], AregMasterBuf_57_55[2],
AregMasterBuf_57_55[2], AregMasterBuf_57_55[2],
AregMasterBuf_57_55[2:0]},
ExpIn[8:0],
TopBitsIn);
ME_OR8 g80 (Stky8[0], Stky8[1], Stky8[2], Stky8[3],
Stky8[4], Stky8[5], Stky8[6], Stky8[7], StkyOR8
);
ME_NAND2 g8d (StkyOR8, SRControl[3], notStkyA
);
ME_NAND4 g81 (notStky4[0], notStky4[1], notStky4[2], notStky4[3], StkyOR4
);
ME_NAND2 g8c (StkyOR4, SRControl[2], notStkyB
);
ME_O2A1I g82 (Stky2[0], Stky2[1], SRControl[1], notStkyC
);
//ME_OR2 g82 (Stky2[0], Stky2[1], StkyOR2);
//ME_NAND2 g84 (StkyOR2, SRControl[1], notStkyC);
ME_INVA g86 (SRControl[0], notSRC0
);
ME_OR2 g85 (notStky1, notSRC0, notStkyD
);
ME_INVA g89 (RomShForAl, notRomShForAl
);
ME_NAND2 gxa (StkyExtra[1], SROneMore, notStkyE
);
ME_NAND2 g8x (notRomShForAl, SROneMore, notgoop
);
ME_NAND2 gxx (notgoop, StkyExtra[0], notLSB
);
//ME_O2A1I g8x (StkyExtra[0], StkyExtra[1], SROneMore, notStkyE);
ME_AND2 g12 (notStkyA, notStkyB, notStkyAB
);
ME_NAND3 g13 (notStkyAB, notStkyC, notStkyD, StkyABCD
);
// When multiplying the last thing we want is the sticky bit getting
// set. The sticky only gets set therefore if we're shifting right
// for align or stifting right to sticky in one go
ME_INVA g90 (SRToStky, notSRToStky
);
ME_NAND2 g91 (notSRToStky, RomShForAl, notSelectStkyABCD
);
ME_NMUX2B g92 (notSelectStkyABCD, StkyABCD, SRToStky, notStkyABCDS
);
ME_AND3 g88 (notStkyE, notLSB, notStkyABCDS, notStkyInForSR);
endmodule
This page: |
Created: | Thu Aug 19 12:00:21 1999 |
| From: |
../../../sparc_v8/ssparc/fpu/fp_ctl/rtl/shiftrightctl.v
|