Programmable Logic Device (SPLDs & CPLDs) - Application Notes

				Using the ATV750 and ATV750B (13 pages, updated 9/99) This Application Note describes how to use the features of the ATV750 and ATV750B in the ABEL (and Atmel-ABEL) and CUPL (and Atmel-CUPL) high level description languages.
				Using the ATV2500 and ATV2500B (16 pages, updated 9/99) This Application Note describes how to use the features of the ATV2500 and ATV2500B in the ABEL (and Atmel-ABEL) and CUPL (and Atmel-CUPL) high level description languages.
				Using Programmable Logic Devices (4 pages, updated 9/99) This Application Note covers three areas: Where and why do I use PLDs? How do I use PLDs? Software and hardware support for Atmel PLDs.
				Selecting Decoupling Capacitors for Atmel PLDs (4 pages, updated 9/99) This Application Note provides a summary of information needed when selecting decoupling capacitors for Atmel PLDs.
				Using a PLD as a System Controller in an I/O Bus Based System (7 pages, updated 9/99) "As Programmable Logic Devices (PLDs) become more complex, the amount of logic that can be placed in one device is rapidly increasing. Complete controllers and subsystems now fit into one or two PLDs."
				Saving Power with Atmel PLDs (7 pages, updated 11/99)
				Using the Programmable Polarity Control (7 pages, updated 8/99) This Application Note shows the proper usage of the popular ABEL and CUPL syntax to congfigure the output polatiry of Atmel PLDs.
				Atmel PLDs' Architectures Simplify Timing Calculations (4 pages, updated 8/99) This Application Note shows different graphical timing models that can help the user visualize the AC timing of the various Atmel PLD families of devices.
				ATV2500 Application Example: Video Frame Grabber (11 pages, updated 8/99) This Application Note shows how the ATV2500 can be used to incorporate multiple control or logic functions into a single programmable logic device. The design example which is used is a simple NTSC video frame grabber.
				Tips on Using Test Vectors for Atmel PLDs (20 pages, updated 9/99) "This Application Note describes the use of test vectors in the ABEL and CUPL HDLs (Hardware Desctiption Languages). In addition, some pitfalls and precautions on the usage of test vectors will be discussed."
				Using the ATF1500(A) CPLD (16 pages, updated 9/99) "This Application Note describes the ATF1500/A architecture, power/speed management features and software support. Examples are given to show how to use the macrocell features in the ABEL and CUPL high level description languages."
				ATF1500 44-Pin Complex Logic (5 pages, updated 9/99)
				OrCAD Support for Atmel PLDs (4 pages, updated 9/97)
				CPLD Design Hints for Atmel-Synario (4 pages, updated 8/99)
				Atmel PLD Frequently Asked Questions-Design Guidelines (11 pages, updated 8/99) This Application Note provides guidelines for designing with Atmel PLDs and answers many frequently asked questions.
				Designing for In-System Programmability with Atmel CPLDs (8 pages, updated 9/97) This Application Note describes design methods and requirements for implementing in-System Programmability (ISP) with Atmel CPLD devices through the Atmel JTAG ISP interface.
				ATF1500AS Product Family Conversion (7 pages, updated 4/99) This Application Note will act as a guide in converting the programming output file from comparable industry standard CPLDs (.POF file) to the Atmel Programming file (.JED) without any functionality or performance loss. The conversion software is availab See Software section to download pof2jed.zip.
				ATF1500AS Family Demo Board (20 pages, updated 12/98) The demo board described in this Application Note is a tool for demonstrating the In-System Programming (ISP) capabilities of the Atmel CPLD family as well as function as a programming unit.
				Introduction to the SMD Product Listing (12 pages, updated 3/00)
				Creating Atmel JAM/JBC File(s) for the ATF1500AS Device Family (4 pages, updated 12/99) It is possible to create and execute JAM and JBC files for the Atmel ATF1500AS family of devices. Before this can be done certain steps must me followed. They are outlined in this Application Note
				Using Active-VHDL Design Entry and Behavioral Simulation with Atmel IDS 6.0 (14 pages, updated 2/00) "For existing users of Active-VHDL, who may wish to retain Active-VHDL's familiar design entry and project management environments while targeting Atmel FPGA families, this document presents a method in which designs can be moved through the design flow across independent synthesis and implementation toolsets."
				In-System Programming of Atmel ATF1500AS Devices on the HP3070 (10 pages, updated 4/00) This Application Note describes programming support for the Hewlett-Packard HP3070 Series of ATE testers/