CORE Generator & IP Modules - Documentation & Data Sheets


 
CORE Generator Documents

CORE Generator Release Docs
CORE Generator User Guides

 

COREGen  IP Module Data Sheets

Basic Elements
DSP
Math Modules
Memories


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CORE Generator Documentation


CORE Generator IP Module Data Sheets

PDF versions of the online datasheets included on the CORE Generator CD for each module produced by Xilinx.

Basic Elements

Function Date Source
pdf 2-1 Multiplexer 7/17/98 Xilinx
pdf 3-1 Multiplexer 7/17/98  
pdf 4-1 Multiplexer 7/17/98  
pdf Parallel to Serial Converter 7/17/98  
pdf Register 7/17/98  

DSP

Building Blocks

pdf Non-Symmetric 16-Deep Time Skew Buffer
pdf Symmetric 16-Deep Time Skew Buffer
pdf Non-Symmetric 32-Deep Time Skew Buffer
pdf Sine-Cosine Look-up Table

Correlators

pdf Serial ROM-based Correlator
pdf Parallel ROM-based Correlator

Filters

pdf Serial Distributed Arithmetic (SDA) FIR Filter
pdf Parallel Distributed Arithmetic (PDA) FIR Filter
pdf Comb Filter

Modulators

pdf Single Channel Numerically Controlled Oscillator
pdf Dual Channel Numerically Controlled Oscillator

Math Modules

Adders and Subtracters

pdf Scaled by 1/2 Accumulator
pdf Registered Adder
pdf Registered Loadable Adder
pdf Registered Loadable Subtracter
pdf Registered Scaled Adder
pdf Registered Serial Adder
pdf Registered Subtracter

Complementers

pdf 1's and 2's Complement

Dividers

pdf Pipelined Divider

Multipliers

pdf Constant Coefficient Multiplier - Non-pipelined
pdf Constant Coefficient Multiplier - Pipelined
pdf Parallel Multiplier - Area Optimized
pdf 8x8 Parallel Multiplier - Speed Optimized
pdf 12x12 Parallel Multiplier - Speed Optimized

Memories

pdf Pipelined Delay Element
pdf Registered Dual Port RAM
pdf Registered ROM
pdf Registered Single Port RAM
pdf Synchronous FIFO
pdf Single Port Block RAM
pdf Dual Port Block RAM