The Configuration Problem Solver
Related Solution Records
Configuration is not being performed on the device.
Solution 4190: "FPGA Configuration: State of DOUT pin before configuration."
Solution 3631: "FPGA Configuration: Unconnected MODE pins may cause FPGAs to not reconfigure."
Solution 1579: "FPGA Configuration: Size of external pulldown needed to create a Logic Low."
Solution 1519: "FPGA Configuration: What Threshold does CCLK use for 5 Volt FPGAs?"
Solution 1428: "FPGA Configuration: CCLK does not toggle in Master Mode."
Solution 492: "FPGA Configuration: Minimum pulse width for PROG to reconfigure an FPGA."
Solution 195: "FPGA Configuration: Which pins are driven during clear/initialization? (master par)"
HISTORY
Family:
XC4000
Mode:
Master Parallel
DONE:
LOW
INIT:
HIGH
ADD:
NO
