Return to Support Page
 homesearchagentssupportask xilinxmap


File Download: docs_M1



Contents of /pub/documentation/M1

  Documentation for M1 software release. ============================================================================= Filename Size File Description ============================================================================= attrib.pdf 1009 Kb M1.4 PDF version of "Attributes, Constraints, and Carry Logic" (chapter 12 of Libraries Guide). For All Platforms Uploaded: 02-19-98 cadence_m1_4.pdf 1178 Kb Cadence Interface/Tutorial Guide for Alliance 1.4 software manual in Adobe Acrobat PDF form. For All Platforms Uploaded: 02-06-98 convergd_m1_4.pdf 411 Kb Xilinx Software Conversion Guide from XACTstep v5.x to XACTstep vM1.x version M1.4. Introduces XACTstep vM1.x tools and gives flow on how to transition existing designs from 5.x to M1.x Solution #: 3096 For All Platforms Uploaded: 04-10-98 mentor_m1_4.pdf 2175 Kb Mentor Graphics Interface/Tutorial Guide for Alliance 1.4 software manual in Adobe Acrobat PDF form. For All Platforms Uploaded: 02-06-98 qstart.pdf 597 Kb The Quick Start Guide for Xilinx Alliance Series 1.4. This guide provides an overview of M1.4 software, installation, an Implementation Tools Tutorial, Interface Notes, and software features. This guide also includes an Alliance Contraints section. Solution #: 3582 For All Platforms Uploaded: 03-05-98 timingan_m1_4.pdf 1012 Kb Timing Analyzer Reference/User Guide for Alliance 1.4 software manual in Adobe Acrobat PDF form. For All Platforms Uploaded: 02-06-98 trace.pdf 108 Kb M1.4 PDF version of "TRACE" (chapter 11 of Development System Reference Guide). For All Platforms Uploaded: 02-19-98 usingcst.pdf 206 Kb M1.4 PDF version of "Using Timing Constraints" (chapter 4 of Development System Reference Guide). For All Platforms Uploaded: 02-24-98 xsi_hdl_dg.pdf 1380 Kb Synopsys (XSI) Synthesis and Simulation Design Guide. This is a manual to assist Synopsys FPGA Compipler users to design into FPGAs using the M1 software. This manual includes design hints(Verilog and VHDL), synthesis tips and simulation techniques For All Platforms SW Release: All M1 Uploaded: 04-23-98

© 1998 Xilinx, Inc. All rights reserved
Trademarks and Patents