V2.1i CORE Generator & IP Modules - Documentation & Data Sheets

to view the  PDF files below.

CORE Generator Documentation

• CORE Generator Release Documents
  Please refer to the Alliance 2.1i Release Document or Foundation 2.1i Release Document for a listing of known issues with the 2.1i release of the CORE Generator.

• CORE Generator v2.1i User Guide
  PDF Version of the online CORE Generator User Guide included on the CORE Generator CD.   Also accessible from the Help menu in COREGen.

   CORE Generator User Guide v2.1ia 7/99 (508 kB)
  ERRATA page for CORE Generator v2.1i User Guide

CORE Generator IP Module Data Sheets

PDF versions of the online datasheets included on the CORE Generator CD for each module produced by Xilinx.

Basic Elements

Function	Architecture	Date	Source
2-1 Multiplexer	4K	7/17/98	Xilinx
3-1 Multiplexer	4K	7/17/98	Xilinx
4-1 Multiplexer	4K	7/17/98	Xilinx
Parallel to Serial Converter	4K	7/17/98	Xilinx
Register	4K	7/17/98	Xilinx

DSP

Building Blocks

Function	Architecture	Date	Source
Non-Symmetric 16-Deep Time Skew Buffer	4K	7/17/98	Xilinx
Symmetric 16-Deep Time Skew Buffer	4K	7/17/98	Xilinx
Non-Symmetric 32-Deep Time Skew Buffer	4K	7/17/98	Xilinx
Sine-Cosine Look-up Table	4K	7/17/98	Xilinx

Correlators

Function	Architecture	Date	Source
Serial ROM-based Correlator	4K	12/30/98	Xilinx
Parallel ROM-based Correlator	4K	12/30/98	Xilinx

Filters

Function	Architecture	Date	Source
Serial Distributed Arithmetic (SDA) FIR Filter	4K	12/30/98	Xilinx
Parallel Distributed Arithmetic (PDA) FIR Filter	4K	12/30/98	Xilinx
Comb Filter	4K	7/17/98	Xilinx

Modulators

Function	Architecture	Date	Source
Single Channel Numerically Controlled Oscillator	4K	12/30/98	Xilinx
Dual Channel Numerically Controlled Oscillator	4K	12/30/98	Xilinx

Math Modules

Adders and Subtracters

Function	Architecture	Date	Source
Scaled by 1/2 Accumulator	4K	7/17/98	Xilinx
Registered Adder	4K	7/17/98	Xilinx
Registered Loadable Adder	4K	7/17/98	Xilinx
Registered Loadable Subtracter	4K	7/17/98	Xilinx
Registered Scaled Adder	4K	7/17/98	Xilinx
Registered Serial Adder	4K	7/17/98	Xilinx
Registered Subtracter	4K	7/17/98	Xilinx

Complementers

Function	Architecture	Date	Source
1's and 2's Complement	4K	7/17/98	Xilinx

Dividers

Function	Architecture	Date	Source
Pipelined Divider	4K, Virtex	5/28/99	Xilinx

Multipliers

Function	Architecture	Date	Source
Constant Coefficient Multiplier - Non-pipelined	4K	7/17/98	Xilinx
Constant Coefficient Multiplier - Pipelined	4K	7/17/98	Xilinx
Dynamic Constant Coefficient Multiplier	Virtex	5/28/99	Xilinx
Parallel Multiplier - Area Optimized	4K	7/17/98	Xilinx
8x8 Parallel Multiplier - Speed Optimized	4K	7/17/98	Xilinx

Memories

Function	Architecture	Date	Source
Pipelined Delay Element	4K	7/17/98	Xilinx
Registered Dual Port RAM	4K	7/17/98	Xilinx
Registered ROM	4K	7/17/98	Xilinx
Registered Single Port RAM	4K	7/17/98	Xilinx
Synchronous FIFO	4K	12/30/98	Xilinx
Single Port Block RAM	Virtex	5/28/99	Xilinx
Dual Port Block RAM	Virtex	5/28/99	Xilinx