The Configuration Problem Solver
Related Solution Records
Configuration is not being performed on the device.
Solution 4190: "FPGA Configuration: State of DOUT pin before configuration."
Solution 2098: "FPGA Configuration: What are the Thresholds for Configuration Pins?"
Solution 1984: "FPGA Configuration: Address Pins A18 - A21 are optional for XC3000EX"
Solution 1579: "FPGA Configuration: Size of external pulldown needed to create a Logic Low."
Solution 492: "FPGA Configuration: Minimum pulse width for PROG to reconfigure an FPGA."
HISTORY
Family:
XC3000
Mode:
Master Parallel
D/P:
LOW
INIT:
HIGH
ADD:
YES
LDC:
LOW
DOUT:
NO
