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Xilinx Answer #7251 : DataBook: Documentation error on p.6-166 of 1999 databook, in Table 9, It should not said 4000xla only.
Xilinx Answer #7139 : 1999 Databook: Alliance software does not ship with the hardware cables and demoboard
Xilinx Answer #6981 : 9500: pull-up on JTAG pins TDI, TMS, TCK; error in 1999 DataBook
Xilinx Answer #6967 : DataBook: BSCAN IDCODE Instruction for SpartanXL is not listed in Datasheet
Xilinx Answer #6955 : DataBook 1999: FG676 package outline drawing for Virtex devices is available on the web
Xilinx Answer #6712 : 1999 DataBook: Typo in the Express Mode PROM Size for Spartan XL chips
Xilinx Answer #6705 : 1999 Databook: Dual-Port RAM table for XC4000E CLB Edge-Triggered (Synchronous) RAM Switching Characteristic Guidelines.
Xilinx Answer #5538 : DataBook: Bonding of XC9536-CS48 in the datasheet seems to be different than that of XC9536XL-CS48
Xilinx Answer #4503 : 98 DATA BOOK: BG352: Vcc and Gnd pin locations appear invalid based on the package drawing
Xilinx Answer #4436 : Databook (1/98), 3k, config, pg 4-321: Need pullup on 3k Init?
Xilinx Answer #4264 : Databook 1998: Pin location for 4000E/X disagrees w/ pinouts
Xilinx Answer #4262 : Databook 1998: Land Width documentation error on page 10-2
Xilinx Answer #4029 : 98 DATABOOK: Does Xilinx have XC4028EX or X4036EX parts in -1 Speed grade?
Xilinx Answer #3832 : 98 DATA BOOK: Package drawing of BG352, BG432 on page 10-34 shows incorrect pin order
Xilinx Answer #3769 : 98 Databook: PG68 package diagram on page 10-36 has missing pin information.
Xilinx Answer #3741 : A1.4 - Problems reading Answers Book from Dynatext viewer
Xilinx Answer #3423 : 96/98 DATA BOOK: RAM: Write enable pulse width following active edge of WCLK.
Xilinx Answer #3328 : 98 DATA BOOK: BGA352/BGA432 package outline error on page 10-34
Xilinx Answer #3024 : DATA BOOK: Timing data applied to Commercial, Industrial, and Military devices
Xilinx Answer #2706 : CPLD DATA BOOK: Jan. 97 edition: The pinout for the 95144 PQ160 package is incorrect
Xilinx Answer #2132 : 96 DATA BOOK: 3064APQ160/3164APQ160 pinouts pin 2 and pin 3 should be N.C. pins
Xilinx Answer #2105 : 96 DATA BOOK/ISP APPLICATION GUIDE: Inconsistency in High-drive output current
Xilinx Answer #2068 : 96 DATA BOOK: Inconsistency in Pinout for 4025E PG299 package
Xilinx Answer #2012 : Input and Output parameters (i.e. setup times) from XDELAY don't match those listed in Data Book.
Xilinx Answer #1935 : XC5200: What is the T(TSHZ) spec for 5200?
Xilinx Answer #1928 : 96 DATA BOOK: No pinout for the XC4036EX in a HQ240 package
Xilinx Answer #1837 : What is the absolute junction temperature Tj for plastic and cermaic parts?
Xilinx Answer #1790 : 96 DATA BOOK: 95108 PQ160 does not have No Connects listed.
Xilinx Answer #1696 : 96 DATA BOOK: Solder time for Maximum soldering temperature is incorrect for 9500 parts
Xilinx Answer #1695 : 96 DATA BOOK:page 4-358 commercial voltage range for 3100A
Xilinx Answer #1645 : 96 DATA BOOK: 4000E prom size (bits) page 4-57
Xilinx Answer #1609 : 96 DATA BOOK: pps. 4-113 to 4-116 4025E / 4028EX/XL pinout shows 21 address pins
Xilinx Answer #1514 : 96 DATA BOOK: Missing dimension for HQ304 lead thickness 'c' on p11-37
Xilinx Answer #1301 : XC5200: Programmable keeper cells are automatically enabled when all buffers are in 3-state mode
Xilinx Answer #1226 : PACKAGES: Information on calculating Temperature/Thermal Characteristics (Theta-JA)
Xilinx Answer #1202 : 96 DATA BOOK: The 4020EHQ240 has 192 user IOs, not 193 as shown on p4-176
Xilinx Answer #979 : 94 DATA BOOK 3rd: PQ100 package dimensions on page 4-10
Xilinx Answer #934 : 94 DATA BOOK 3rd: Solder pad layout for PQ160 package on page 4-2 shows an incorrect I2 dimension
Xilinx Answer #782 : How can hold time violations occur when the data book states 0 ns hold times?
Xilinx Answer #519 : 94 DATA BOOK 2nd Edition: P. 2-85, PG156 package is missing I/O (A6) pin number
Xilinx Answer #439 : 94 DATA BOOK: Error in PG299 Package Drawing, page 4-24
Xilinx Answer #380 : 94 Data Book: page 3-52, pinout for 73108pq160 error: pin 160 is GND
Xilinx Answer #335 : 94 DATA BOOK 3rd: TQ176 package dimensions on page 4-18 are incorrect
Xilinx Answer #230 : 94 DATA BOOK 2nd: Presettable Down Counter on page 8-72 is misdrawn
Xilinx Answer #223 : 94 DATA BOOK 3rd: error in 4005pq160 pinout, p. 2-57
Xilinx Answer #123 : XC4000: Use NODELAY attribute to get (fast) Input FF databook speed w/o delay