.e_rdym (e_rdym
),
.e_rdtbrm (e_rdtbrm
),
.e_jmpcallm (e_jmpcallm
),
.sel_pcspec_l (sel_pcspec_l
),
.rdtpcm (rdtpcm
),
.w_wrpsr (w_wrpsr
),
.hold_cc (hold_cc
),
.load_cc (load_cc
),
.write_cc (write_cc
),
.restore_cc (restore_cc
),
.clret_sets (clret_sets
),
.setet_ps2s (setet_ps2s
),
.write_etps (write_etps
),
.hold_ets (hold_ets
),
.s_into_ps (s_into_ps
),
.hold_ps (hold_ps
),
.hld_pilefec (hld_pilefec
),
.cwp_inc (cwp_inc
),
.wcwpm1 (wcwpm1),
.cwpp1 (cwpp1),
.cwpm1 (cwpm1),
.wcwp (wcwp),
.cwp (cwp),
.cwp_dec (cwp_dec
),
.cwp_hold (cwp_hold
),
.ecwp_next (ecwp_next
),
.cwp_recirc (cwp_recirc
),
.hld_wim (hld_wim
),
.wimm (wimm),
.hld_tba (hld_tba
),
.hld_tt (hld_tt
),
.n_hld_tt_scan (n_hld_tt_scan
),
.wr_lddatam_l (wr_lddatam_l
),
.word_store_d (word_store_d
),
.half_store_d (half_store_d
),
.byte_store_d (byte_store_d
),
.s (s),
.ns (ns
),
.psm (psm
),
.et (et),
.ef (ef
),
.pil (pil),
.alu_out_lsb5 (alu_out_lsb5),
.mm_dacc_exc_w (mm_dacc_exc_w),
.mm_dacc_err_w (mm_dacc_err_w),
.mm_dacc_mmu_miss_w (mm_dacc_mmu_miss_w),
.mm_dacc_wp_w (mm_dacc_wp_w),
.iu_mm_iacc_wp_exc_d (iu_mm_iacc_wp_exc_d),
.start_itag_inv (start_itag_inv),
.q3_iae (q3_iae),
.q3_ptc (q3_ptc),
.q2_iae (q2_iae),
.q2_ptc (q2_ptc),
.q1_iae (q1_iae),
.q1_ptc (q1_ptc),
.stop_fetch (stop_fetch
),
.did_fetch (did_fetch),
.this_s (this_s),
.sup_ex_trap (sup_ex_trap),
.FEXC (FEXC),
.iwait_f (iwait_f),
.dwait_w_for_flush (dwait_w_for_flush),
.ld_op_e (ld_op_e),
.ld_op_e_mmu (ld_op_e_mmu),
.ld_op_d (ld_op_d),
.sgnd_ld_e (sgnd_ld_e),
.st_op_e (st_op_e),
.st_op_e_mmu (st_op_e_mmu),
.st_op_d (st_op_d),
.fpu_mem_e (fpu_mem_e),
.size_e (size_e),
.hld_car_mar (hld_car_mar),
.hld_lgens (hld_lgens),
.rf_we_w (rf_we_w
),
.error_mode (error_mode),
.ER_SDOUT (ER_SDOUT
),
.pfcc (pfcc),
.pfccv (pfccv),
.ss_clock (ss_clock),
.hold (hold_Mdecode
),
.hold_noic (hold_noic
),
.hold_ic (hold_ic),
// .extend_tag_miss (extend_tag_miss),
.enbl_br_fold (enbl_br_fold),
.w_hhn_2 (w_hhn_2
),
.lta_hold (lta_hold),
.reset (reset),
.iu_iflush_e (iu_iflush_e),
.valid_decode (valid_decode),
.select_FP_DOUT (select_FP_DOUT),
.sel_ldstb_1 (sel_ldstb_1),
.select_IU_DOUT (select_IU_DOUT),
.IU_in_trap (IU_in_trap),
.IU_in_trap4fpu (IU_in_trap4fpu),
.IU_in_trap4dc (IU_in_trap4dc),
.FXACK (FXACK),
.ss_reset (ss_reset),
.IRL (IRL),
.iu_asi_e (iu_asi_e),
.sel_lta_fpc (sel_lta_fpc),
.sel_idpc_fpc (sel_idpc_fpc),
.sel_post_reset (sel_post_reset),
.sel_p_fpc (sel_p_fpc),
.sel_alt_tag (sel_alt_tag),
.sel_i1pfpc_fpc (sel_i1pfpc_fpc),
.sel_i2dpc_fpc (sel_i2dpc_fpc),
.fetch_ic_even (fetch_ic_even),
.fetch_ic_odd (fetch_ic_odd),
.fetch_TOQ (fetch_TOQ),
.fetch_alt (fetch_alt),
.fetch_SIQ (fetch_SIQ),
.ncant_unload (ncant_unload),
.hold_alt (hold_alt),
.fold_annul (fold_annul),
.sel_shift1 (sel_shift1),
.sel_shift2 (sel_shift2),
.sel_shift3 (sel_shift3),
.sel_fold1 (sel_fold1),
.sel_fold2 (sel_fold2),
.sel_even1 (sel_even1),
.sel_odd1 (sel_odd1),
.hold_q1 (hold_q1),
.sel_even2 (sel_even2),
.sel_odd2 (sel_odd2),
.hold_q2 (hold_q2),
.sel_even3 (sel_even3),
.sel_odd3 (sel_odd3),
.hold_q3 (hold_q3),
.hold_q4 (hold_q4),
.hld_backup (hld_backup),
.take_icdata (take_icdata),
.sel_old_aa (sel_old_aa),
.hld_dir2 (hld_dir2),
.sel_last_gen (sel_last_gen),
.recirc2_default (recirc2_default),
.sel_inc_ll_gen (sel_inc_ll_gen),
.sel_inc_dpc (sel_inc_dpc),
.sel_inc_alttag (sel_inc_alttag),
.sel_gpc (sel_gpc),
.sel_recirc (sel_recirc),
.sel_recirc_inc (sel_recirc_inc),
.sel_lgen_iva (sel_lgen_iva),
.sel_gpc_ic (sel_gpc_ic),
.sel_recirc_ic (sel_recirc_ic),
.sel_recirc_inc_ic (sel_recirc_inc_ic),
.sadr_zero_ic (sadr_zero_ic),
.force_ifill (force_ifill),
.flush_ic_e (flush_ic_e
),
.force_dva (force_dva),
.sel_lgen_ica (sel_lgen_ica),
.fwd_wpc (fwd_wpc),
.use_tpc (use_tpc),
.fwd_tpcm4 (fwd_tpcm4),
.toq_entry_bits (inst_for_br[31:22]),
.nq1_entry_hi (nq1_entry_hi),
.iexc_for_br (iexc_for_br[10:2]),
.niexc1_hi (niexc1_hi),
.iexc_for_int_hi (iexc_for_int[10:2]),
.fpc_low (fpc_low),
.nlta_low (nlta_low),
.ndpc_low (ndpc_low),
.nalttag_low (nalttag_low),
.ic_force_ifill_g (ic_force_ifill_g),
.mm_istat_avail (mm_istat_avail),
.i_dva_req (i_dva_req),
.iu_event (iu_event),
.nbrs1_decm (nbrs1_decm),
.brs3_d (brs3_d),
.nr_rdp (nr_rdp),
.in_dec_lo22 (in_dec_lo22),
.d_imm_l (d_imm_l
),
.iu_sfs_sup (iu_sfs_sup),
.iu_sfs_perr (iu_sfs_perr),
.iu_sfs_xerr (iu_sfs_xerr),
.iu_sfs_mmiss (iu_sfs_mmiss),
.iu_sfs_iae (iu_sfs_iae),
.iu_sfs_sbe (iu_sfs_sbe),
.iu_sfs_sto (iu_sfs_sto),
.iu_sfs_prtct (iu_sfs_prtct),
.iu_sfs_priv (iu_sfs_priv),
.iu_sfs_lvl (iu_sfs_lvl),
.w_op (w_op),
.w_op3_5 (w_op3_5
),
.w_op3_3 (w_op3_3
),
.w_op3_2 (w_op3_2
),
.w_op3_0 (w_op3_0
),
.inst_for_int (inst_for_int),
.ndec_inst_traps (ndec_inst_traps),
.ncwpm_l (ncwpm_l),
.ss_scan_mode (ss_scan_mode),
.Mdecode_scan_in (Mqueue_scan_out), // decode_scan_in (stitcher will connect)
.Mdecode_scan_out (Mdecode_scan_out) // decode_scan_out (ditto)
);
//------------------------------------------------------------
// pipehold control module
wire [2:0] pipe_hold4fpc;
wire [1:0] pipe_hold4dc_l;
Mhold_control hold_control(
.FHOLD (FHOLD),
.ER_SDOUT (ER_SDOUT),
.ss_clock (ss_clock),
.ss_scan_mode (ss_scan_mode),
.dwait_w (dwait_w),
.dt_hit_w (dt_hit_w),
.dc_shold (dc_shold),
.enbl_dtag_match_w (enbl_dtag_match_w),
.enbl_itag_match_f (enbl_itag_match_f),
.iwait_f (iwait_f),
.it_hit_f (it_hit_f),
.force_ifill (force_ifill),
.flush_ic_e (flush_ic_e),
.reset (reset),
.w_hhn_2 (w_hhn_2),
.w_op (w_op),
.w_op3_5 (w_op3_5),
.w_op3_3 (w_op3_3),
.w_op3_2 (w_op3_2),
.w_op3_0 (w_op3_0),
.stop_fetch (stop_fetch),
.ic_idle (ic_idle),
.mm_icache_enbl (mm_icache_enbl),
.hold (hold),
.pipe_hold4fpc (pipe_hold4fpc),
.pipe_hold4fprf (pipe_hold4fprf),
.pipe_hold4mmu_cntl (pipe_hold4mmu_cntl),
.pipe_hold4mmu_dp (pipe_hold4mmu_dp),
.pipe_hold4dc (pipe_hold4dc),
.pipe_hold4dc_l (pipe_hold4dc_l),
.pipe_hold4ic (pipe_hold4ic),
.hold_Mexec1 (hold_Mexec1
),
.hold_Mexec2 (hold_Mexec2
),
.hold_Mexec3 (hold_Mexec3
),
.hold_Mdecode (hold_Mdecode),
.hold_Mregfile (hold_Mregfile
),
.hold_noic (hold_noic),
.hold_ic (hold_ic),
.fast_hld_terms (fast_hld_terms),
.ihold_d1 (ihold_d1),
.dhold_d1 (dhold_d1),
// .extend_tag_miss (extend_tag_miss),
.enbl_fetch (enbl_fetch),
.Mhold_control_scan_in (Mdecode_scan_out),
.Mhold_control_scan_out (Mhold_control_scan_out)
);
//--------------------------------------------------------------------------
// REGFILE MODULE
Mregfile regfile(src1m, src2m, src3,
result, ld_iu, wr_lddatam_l,
rf_we_w,
nr_rdp,
nbrs1_decm, nbrs2_decm, brs3_d,
ncwpm_l,
byp_rf3, byp_wr3, byp_res3,
hld_dirreg_rf,
alus1_b3m, alus2_b3m,
word_store_d, half_store_d, byte_store_d,
hold_Mregfile, ss_clock, ss_scan_mode,
Mexec_scan_out, Mregfile_scan_out
);
//---------------------------------------------------------------------------
// EXECUTION (ALU) MODULE
wire [31:0] simm32m
; // sign extended immediate data
wire [31:0] pc_or_specm
;// output of special register/pc mux
Mexec exec (
.alu_out_lsb5 (alu_out_lsb5),
.alu_s1m_0 (alu_s1m_0),
.alu_s2m_5_0 (alu_s2m_5_0),
.alu_shift (alu_shift),
.alu_shift_dc (iu_dva_e_dc),
.high_2_1 (high_2_1),
.result (result),
.alu_cc_next (alu_cc_next),
.alu_s1s_lsb2 (alu_s1s_lsb2),
.src1m (src1m),
.disp22 (in_dec_lo22[21:0]),
.src2m (src2m),
.tpc (tpc),
.wpc (wpc),
.wimm (wimm),
.ym_lo3 (ym_lo3[2:0]),
.tbrm (tbrm),
.e_rdpsrm (e_rdpsrm),
.e_rdwimm (e_rdwimm),
.e_rdym (e_rdym),
.e_rdtbrm (e_rdtbrm),
.e_jmpcallm (e_jmpcallm),
.rdtpcm (rdtpcm),
.alus1_datam (alus1_datam),
.alus1_rfm_b3m (alus1_rfm_b3m),
.alus1_b2m (alus1_b2m),
.alus1_b1m (alus1_b1m),
.alus1_setm (alus1_setm),
.alus2_datam (alus2_datam),
.a2top_default (a2top_default),
.rs2_passit (rs2_passit),
.d_imm (in_dec_lo22[13]),
.d_imm_l (d_imm_l),
.alus2_b2m (alus2_b2m),
.alus2_b1m (alus2_b1m),
.alu_s2_reg_hold (alu_s2_reg_hold),
.carry_in (carry_in),
.pass_hi_rs1 (pass_hi_rs1),
.det_divovf (det_divovf),
.alu_ADD (alu_ADD),
.alu_AND (alu_AND),
.alu_XNOR (alu_XNOR),
.tagged_ovf (tagged_ovf),
.alu_sub (alu_sub),
.shift_left (shift_left),
.arith_shift (arith_shift),
.rs_from_sh (rs_from_sh),
.rs_from_alu (rs_from_alu),
.rs_from_else (rs_from_else),
.force_neg (force_neg),
.force_pos (force_pos),
.rs1_pass (rs1_pass),
.spc_mux_default (spc_mux_default),
.rs1_clear (rs1_clear),
.rs1_double (rs1_double),
.nrs1_negate (nrs1_negate),
.nrs1_negate_l (nrs1_negate_l),
.sel_srl2_mult (sel_srl2_mult),
.rs2_clear (rs2_clear),
.nsel_w_mult (nsel_w_mult),
.nsel_w_mult_l_b (nsel_w_mult_l_b),
.nsel_w_mult_l_not_b (nsel_w_mult_l_not_b),
.sel_sll1_divalu (sel_sll1_divalu),
.sel_sll1_divalu_l (sel_sll1_divalu_l),
.msign_bit (msign_bit),
.dsign_bit1 (dsign_bit1),
.dsign_bit2 (dsign_bit2),
.rf2_imm_data_msb (rf2_imm_data_msb),
.hold_Wreg (hold_Wreg),
.idiv_shiftin_low (idiv_shiftin_low),
.eopc_hidiv3 (eopc_hidiv3),
.use_hi_y (use_hi_y),
.use_hi_alu (use_hi_alu),
.use_hi_rs1_default (use_hi_rs1_default),
.use_hi_rs2 (use_hi_rs2),
.use_low_rs1 (use_low_rs1),
.use_hi_rs2_default (use_hi_rs2_default),
.not_rs2_rs1_default (not_rs2_rs1_default),
.alus1_b2_shift (alus1_b2_shift),
.sel_rs1_shiftin (sel_rs1_shiftin),
.ne_mulsm (ne_mulsm),
.next_e_not_negmul (next_e_not_negmul),
.sel_pcspec_l (sel_pcspec_l),
.ss_clock (ss_clock),
.hold_Mexec1 (hold_Mexec1),
.hold_Mexec2 (hold_Mexec2),
.hold_Mexec3 (hold_Mexec3),
.ss_scan_mode (ss_scan_mode),
.hld_wim (hld_wim),
.trapcode (trapcode),
.TRAP (TRAP),
.hld_tba (hld_tba),
.hld_tt (hld_tt),
.n_hld_tt_scan (n_hld_tt_scan),
.n_ymsb (n_ymsb),
.wr_y (wr_y),
.wr_mulscc (wr_mulscc),
.hld_y (hld_y),
.cwp (cwp),
.cwpm_ (cwpm_l),
.ncwpm_ (ncwpm_l),
.ecwpm_ (ecwpm_),
.wcwpm1 (wcwpm1),
.cwpp1 (cwpp1),
.cwpm1 (cwpm1),
.wcwp (wcwp),
.ccm (ccm),
.s (s),
.little_endian (little_endian),
.sm (sm
),
.ns (ns),
.psm (psm),
.et (et),
.ef (ef),
.pil (pil),
.hold_cc (hold_cc),
.load_cc (load_cc),
.write_cc (write_cc),
.restore_cc (restore_cc),
.clret_sets (clret_sets),
.setet_ps2s (setet_ps2s),
.write_etps (write_etps),
.hold_ets (hold_ets),
.s_into_ps (s_into_ps),
.hold_ps (hold_ps),
.hld_pilefec (hld_pilefec),
.w_wrpsr (w_wrpsr),
.cwp_inc (cwp_inc),
.cwp_dec (cwp_dec),
.cwp_hold (cwp_hold),
.ecwp_next (ecwp_next),
.cwp_recirc (cwp_recirc),
.ld_iu (ld_iu),
.ccN_noninv (ccN_noninv),
.ccZ_noninv (ccZ_noninv),
.exec_scan_in (Mhold_control_scan_out), // should be exec_scan_in
.exec_scan_out (Mexec_scan_out) // should be exec_scan_out
);
wire iu_sup_mode = sm;
//-----------------------------------------------------------------------
// DCACHEIF MODULE
assign iu_dva_e = alu_shift;
/*
* moved to Mexec
Mdcacheif dcacheif (
.iu_dout (iu_dout),
.alu_shift (alu_shift),
.src3 (src3),
.fp_dout (fp_dout),
.select_FP_DOUT (select_FP_DOUT),
.sel_ldstb_1 (sel_ldstb_1),
.select_IU_DOUT (select_IU_DOUT),
.ss_clock (ss_clock),
.hold (hold),
.ss_scan_mode (ss_scan_mode),
.dcacheif_scan_in (Mexec_scan_out), // should be dcacheif_scan_in
.dcacheif_scan_out (Mdcacheif_scan_out) // should be dcacheif_scan_out
);
*/
// synopsys translate_off
// some monitors
always @ (posedge(~ss_clock))
#1 if ( ((reset===1'b0) & (ld_op_e | st_op_e | fpu_mem_e) & (
iu_dva_e[31] ^ iu_dva_e[30]
^iu_dva_e[29]^iu_dva_e[28]^iu_dva_e[27]^iu_dva_e[26]
^iu_dva_e[25]^iu_dva_e[24]^iu_dva_e[23]^iu_dva_e[22]
^iu_dva_e[21]^iu_dva_e[20]
^iu_dva_e[19]^iu_dva_e[18]^iu_dva_e[17]^iu_dva_e[16]
^iu_dva_e[15]^iu_dva_e[14]^iu_dva_e[13]^iu_dva_e[12]
^iu_dva_e[11]^iu_dva_e[10]
^iu_dva_e[9]^iu_dva_e[8]^iu_dva_e[7]^iu_dva_e[6]
^iu_dva_e[5]^iu_dva_e[4]^iu_dva_e[3]^iu_dva_e[2]
^iu_dva_e[1]^iu_dva_e[0])) === 1'bx) begin
$display("*** iu_dva_e unknown!!!\n");
Mclocks.error_count = Mclocks.error_count + 1;
end
// synopsys translate_on
endmodule
This page: |
Created: | Thu Aug 19 12:03:32 1999 |
| From: |
../../../sparc_v8/ssparc/iu/rtl/iu.v
|