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Xilinx Answer #8246 : 2.1i Foundation ABEL: Combinatorial set assignment within a state machine works only in var=[x,x] format not var=^bxx format.
Xilinx Answer #6288 : F1.5iS2: XABEL: Registered Sets cannot be assigned using HEX, Octal, Binary or Decimal representation
Xilinx Answer #6286 : F1.5iS2: Using block statement structures using {,}s in Abel state machine assignments may cause incorrect equations
Xilinx Answer #4996 : Foundation ABEL: Internal Error 0001: assert event at line 376 in file "Z:\Lib\tsokit\TSOCELL\TSO_SIG.C"
Xilinx Answer #4766 : F1.5 XABEL: Abl2edif creates an incorrect netlist when the underscore character is used at the end of a signal name: give based:24 error in translate
Xilinx Answer #4640 : F1.5/F1.5i XABEL: the executable ahdl2blf exited with error code 2
Xilinx Answer #4572 : XABEL: abl2edif.exe failed <abel_file_name>.EDN was not created. Error report not available
Xilinx Answer #4379 : F1.4, XABEL: Warning L0/C0 : only <x> out of <y> vectors passed Which files contains test vector results?
Xilinx Answer #4346 : F1.4 XABEL: Xilinx Property 'Initialstate' passes INIT property, which isn't supported
Xilinx Answer #4325 : Foundation XABEL F1.4/F1.5/F1.5i: ERROR:basnu:93 - logical block "<>" of type "FDP" is unexpanded.
Xilinx Answer #4277 : F1.5/M1.5 XABEL: ABEL compiler does not run when installed on a network drive
Xilinx Answer #3984 : XABEL, Foundation F1.4: XABEL patch available on Web site
Xilinx Answer #3755 : XABEL, F1.4: App Note available for using XABEL with F1.4
Xilinx Answer #3719 : XABEL (DS-371) and Alliance software; workstation support
Xilinx Answer #3605 : Foundation F1.x, XABEL: ahdl2blf exited with error code 1
Xilinx Answer #3562 : Foundation F1.x, XABEL: Xabel.exe not found
Xilinx Answer #3358 : XABEL: How to lock down (constrain) pins through ABEL code
Xilinx Answer #3288 : Foundation XABEL/ABL2EDIF: Logical Error 18823: Enable 'signal.OE' is only allowed when top_level specified.
Xilinx Answer #3278 : XABEL: how to implement a bidirectional bus in abel
Xilinx Answer #3253 : XABEL, M1.4: Using XABEL with M1.4 Alliance software
Xilinx Answer #3188 : Foundation F1.3 XABEL: Ambiguous interpretation of feedback signals
Xilinx Answer #3153 : XABEL, Foundation F1.x: Internal Error 18911 in Blif2net (abl2edif)
Xilinx Answer #3101 : XABEL 6: Feedback signals interpreted differently in M1 (EDIF) than XACT (PLD)
Xilinx Answer #3098 : XABEL: Does Foundation need to be installed to use XABEL with Alliance software?
Xilinx Answer #3021 : Foundation F1.x/ XABEL: XEPLD/Plusasm Properties not supported with EDIF-based Abel flow
Xilinx Answer #3020 : Foundation, XABEL: Supported 'Xilinx Property' for CPLDs with XABEL6
Xilinx Answer #3007 : XABEL, Foundation F1.x: AHDL2BLF or BLIFOPTstep runs indefinitely during ABL2EDIF
Xilinx Answer #2988 : Foundation F1.x XABEL: XEPLD/Plusasm 'Partition' property not supported
Xilinx Answer #2965 : Foundation F1.3, XABEL: Online Help shows incorrect syntax for XABEL LOC = FBnn property.
Xilinx Answer #2961 : XABEL should support Xilinx property 'LOC=FBnn'
Xilinx Answer #2937 : Foundation F1.x, XABEL 6: XABEL cannot be run from the network
Xilinx Answer #2871 : Foundation F1.x, XABEL: Error:hi301 - cannot fit the design into any of the specified devices
Xilinx Answer #2834 : XABEL, Foundation F1.3: Internal Error 0001: assert event at line 274 in file Z:\fit\blif2net\TSOINTER.CXX
Xilinx Answer #2776 : Foundation F1.x XABEL: How to generate .PLD (Plusasm) file from XABEL
Xilinx Answer #2663 : XABEL6, Foundation F1.x: EDIF netlists from XABEL in M1/F1 are encrypted.
Xilinx Answer #2662 : XABEL6, Foundation F1.3/F1.4: OLE server errors when ABEL from other vendor installed (registry).
Xilinx Answer #1929 : Xc9500: The fitter report pinout does not match that of the data book
Xilinx Answer #1891 : ** XABEL-CPLD6.1.2: problem with OLE server registration
Xilinx Answer #1846 : 2.1i/1.5x/XABEL-CPLD: Controlling optimization using 'keep' and 'LOGIC_OPT'
Xilinx Answer #1799 : ** XABEL-CPLD: "Done: failed with exit code: 0003" when running Fitter
Xilinx Answer #1717 : XABEL-CPLD: Does it run under Windows 95?
Xilinx Answer #1711 : XABEL-CPLD 6.1.2: Is this an automatic upgrade to v6.1.1?
Xilinx Answer #1669 : ** XABEL-CPLD: Out Of Memory error or long compile times (@CARRY directive)
Xilinx Answer #1641 : ** XABEL-CPLD: Some hints on the error 'Done: failed with exit code: 0001'
Xilinx Answer #1631 : XABEL-CPLD v6.1.2: JEDEC to ABEL Conversion not available under Win95
Xilinx Answer #1571 : XEPLD/XABEL: xr2: [Error] Ignoring symbol with same name as previous symbol.
Xilinx Answer #1350 : XABEL: How to assign set/reset preload values to registers in an FPGA
Xilinx Answer #1349 : XABEL: How to assign preload value to registers in an EPLD
Xilinx Answer #1190 : **Obsolete Solution**: XC7300 : How to force a wired-AND function into the UIM in Xabel-CPLD
Xilinx Answer #1175 : XABEL: Xt Warning: ...Couldn't open file xmain.uid - MrmNOT_FOUND
Xilinx Answer #1167 : XABEL: AHDL2X will hang at "processing equations..." with wide buses.
Xilinx Answer #1050 : Designing with the XC9500 family in Mentor (XACT 5.2.x)
Xilinx Answer #1038 : **Obsolete Solution**: XABEL-CPLD: Possible cause of General Prot. Faults, and being disconnected from Internet/network
Xilinx Answer #1036 : CPLD: ABEL: Controlling Global Net Utilization for 9500 designs with XABEL-CPLD
Xilinx Answer #914 : **Obsolete Solution**: Installing XABEL-CPLD Software Over A Network
Xilinx Answer #675 : XABEL 5.1 (BLIFOPTX) fails on Truth Table designs
Xilinx Answer #543 : XABEL 5.1/EPLD designs: FOE pins are active *high*
Xilinx Answer #426 : XABEL 5.0, XC7000 EPLD: Trouble accessing D1 and D2 alu pins
Xilinx Answer #424 : XABEL 5.0 and XC7000 EPLDS: The .D extension is not supported by PLUSASM