ARM7
CoreMP7 M7 Devices Tools Overview Ecosystem Intellectual Property Evaluation
  Documentation  


Bringing ARM7™ to the Masses

ARM7 is the most widely used 32-bit RISC microprocessor – billions have been shipped. Actel's CoreMP7 is a soft IP version of the popular ARM7TDMI-S™ that has been optimized to maximize speed and minimize size in Actel's M7 ProASIC3 and M7 Fusion Flash-based FPGAs. With CoreMP7, Actel is bringing ARM7 to the masses with no upfront licensing fees and no royalties. FPGA users no longer have to settle for a proprietary 32-bit processor core. Instead, they can use the industry-standard ARM7 with its well-known architecture and popular instruction set. CoreMP7 executes the ARMv4T instruction set architecture and implements all 32-bit ARM7 instructions and all 16-bit Thumb® instructions. The processor has a 3-stage pipeline, 32-bit ALU, 32-bit register file, a 32-bit external address and data bus interface, and JTAG debug interface.

 

 
CoreMP7 Details

  • Compatible with ARM7TDMI-S
  • 32/16-bit RISC architecture
  • 32-bit ARMv4T instruction set
  • 16-bit Thumb instruction set
  • 32-bit Arithmetic Logic Unit (ALU)
  • 3-stage pipeline
  • 32-bit external bus interface
  • Embedded real-time debug and JTAG interface
  • Optimized for Actel Flash-based M7 devices
  • Implemented fully in the fabric
  • All I/Os are accessible to the user
  • Seamless FPGA design and debug tool flow and integration

CoreMP7 Subsystem:
An important set of functional blocks in a microprocessor is the subsystem peripherals. These include all of the low-level functionality that must be implemented around the processor for it to be used in an application.

The CoreMP7 subsystem peripherals include:
  • AHB-Lite interface
  • APB interface
  • AHB to APB bridge
  • Memory controller
  • Interrupt controller
  • Timers
  • Serial interface
  • Buffered I/O interface

 

The CoreMP7 subsystem peripherals are delivered as part of the CoreConsole IP Deployment Platform (IDP).

M7 Devices

CoreMP7 is available for use in M7 Flash family devices, which have been made ARM-ready for seamless use of the processor core. The devices are based on Actel's nonvolatile Flash technology and support 250 k to 3 M gates and up to 616 high-performance I/Os.

M7 Fusion Devices

M7 Fusion The M7 Fusion devices combine the power of ARM7 with the world's first mixed-signal FPGAs. Fusion devices integrate configurable analog, large Flash memory blocks, SRAM memory, comprehensive clock generation and management circuitry, and high performance programmable logic all in a single chip. The devices interface to the real world with up to 30 high-voltage-tolerant analog inputs that can be directly connected to signals from -12 V to +12 V, eliminating the need for signal preconditioning. The on-chip Fusion analog to digital converter (ADC) is configurable and supports resolutions up to 12 bits, and sample rates up to 600 k samples per second (ksps). M7 Fusion devices give engineers a single-chip solution for their real world design challenges.

Package
M7AFS600
M7AFS1500
PQ208 95/46 (40)  
FG256 119/58 (40) 119/58 (40)
FG484 172/86 (40) 228/86 (40)
FG676   278/139 (40)

Note: The data in the table shows the single-ended I/Os / differential pairs (analog I/O) for the device in the package.

For more information, visit the Fusion Devices web page.

M7 ProASIC3/E Devices

ProASIC3 The M7 ProASIC3/E devices are a secure, low-power, live at power-up, single-chip solution. They are reprogrammable and offer fast time-to-market benefits at an ASIC-level unit cost. These features enable engineers to create high-performance, high-density system applications with ARM7 using existing FPGA design flows and tools. In addition, M7 ProASIC3/E devices offer on-chip, user memory and clock conditioning circuitry based on up to six on-board phase-locked loops (PLLs).

Package
M7A3P250
M7A3P400
M7A3P600
M7A3P1000
M7A3PE600
M7A3PE1500
M7A3PE3000
VQ100
68/13
PQ208
151/34
151/34
154/35
154/35
147/65
147/65
147/65
FG144
97/24
97/25
97/24
97/25
FG256
178/38
179/45
177/44
165/79
FG484
194/38
227/56
300/74
270/135
280/136
280/136
FG676
439/209
FG896
616/300

Note: The data in this table shows the single-ended I/Os / differential pairs available for the device in the package.

For more information, visit the ProASIC3 Devices web page.

CoreMP7 Tools Overview

A major benefit for users of Actel's CoreMP7 FPGA optimized ARM7 microprocessor is the huge ecosystem of tools and design support as well as the large volume of embedded software code that exists for it. To this rich selection of tools, Actel offers its world-class set of FPGA development tools, a development kit, and device programming.

CoreConsole:
  • Intellectual Property Deployment Platform (IDP)
  • Includes a graphical interface and a block stitcher to simplify the assembly of IP cores for embedded applications in FPGAs.
  • Integrates with Actel Libero IDE, which includes Actel Designer software for place-and-route.
  • Read the latest CoreConsole Release Notes and download software.
ARM RealView® Developer Kit:
  • Provides tools for building, debugging, and managing software development projects that run on the processor.
  • Contains an optimized C compiler, debugger, assembler, and instruction set simulator.
  • Available from Actel.
Actel FlashPro3 Programmer:
  • M7 ProASIC3/E and M7 Fusion devices support in-system programming (ISP).
  • Configuration data is supplied through a standard JTAG interface from a microprocessor, Silicon Sculptor II, or FlashPro3.
CoreMP7 Development Kit:
  • Complete prototype and development environment
  • Includes: board with an M7 ProASIC3 device, Actel Libero IDE Gold, CoreConsole, C program development tools, an optional FlashPro3 programmer with a USB cable, a power supply, tutorials, and support documentation.
  • Enables application development with CoreMP7 in Actel nonvolatile M7 ProASIC3/E devices, and supports ISP, device serialization, and FlashLock on-chip system security.
  • For more details, visit the CoreMP7 Development Kit page.

Documentation

Datasheets:

CoreMP7:

  CoreMP7 Datasheet  PDF 240 KB 4/06
  CoreMP7 Product Brief  PDF 87 KB 4/06

CoreAI:

  CoreAI Datasheet  PDF 211 KB 3/06
  CoreAI Product Brief  PDF 87 KB 3/06

Fusion:

Fusion Family of Mixed-Signal Flash FPGAs Datasheet  PDF 1.8 MB 4/06
  Fusion Product Brief  PDF 143 KB 4/06

ProASIC3/E:

ProASIC3 Flash Family FPGAs Datasheet  PDF 1.5 MB 4/06
ProASIC3E Flash Family FPGAs Datasheet  PDF 1.4 MB 4/06
ProASIC3 Product Brief  PDF 140 KB 4/06
ProASIC3E Product Brief  PDF 124 KB 4/06

SysBASIC - CoreMP7 Subsystem Cores:

CoreAHB Datasheet  PDF 71 KB 4/06
CoreAHB2APB Datasheet  PDF 48 KB 4/06
CoreAHBLite Datasheet  PDF 66 KB 4/06
CoreAhbNvm Datasheet  PDF 100 KB 4/06
CoreAhbSram Datasheet  PDF 60 KB 4/06
CoreAPB Datasheet  PDF 51 KB 4/06
CoreFROM Datasheet  PDF 54 KB 4/06
CoreGPIO Datasheet  PDF 50 KB 4/06
CoreInterrupt Datasheet  PDF 78 KB 4/06
CoreMemCtrl Datasheet  PDF 59 KB 4/06
CoreMP7Bridge Datasheet  PDF 151 KB 4/06
CoreRemap Datasheet  PDF 50 KB 4/06
CoreTimer Datasheet  PDF 72 KB 4/06
CoreUARTapb Datasheet  PDF 73 KB 4/06
CoreWatchdog Datasheet  PDF 63 KB 4/06

Packaging Data:

Package Mechanical Drawings  PDF 1.6 MB 4/06
Package Thermal Characteristics and Weights  PDF 50 KB 1/05
Hermetic Package Mechanical Configuration  PDF 24 KB 11/03

 

Application Notes:

CoreMP7:

Generating Power on Reset for CoreMP7  PDF 218 KB 10/05
Designing a Web Server System Using CoreMP7  PDF 61 KB 10/05

Fusion:

Fusion FlashROM  PDF 241 KB 12/05
Fusion Security  PDF 825 KB 4/06
Fusion SRAM/FIFO Blocks  PDF 402 KB 12/05
Temperature Monitoring Techniques for Fusion  PDF 143 KB 1/06
Using DDR for Fusion Devices  PDF 389 KB 12/05
Using Fusion FIFO for Generating Periodic Waveforms  PDF 116 KB 12/05
Using Fusion RAM as Multipliers  PDF 389 KB 12/05

ProASIC3/E:

Power-Up/Down Behavior of ProASIC3/E Devices  PDF 189 KB 6/05
Programming Flash Devices  PDF 137 KB 9/05
ProASIC3/E I/O Usage Guide   PDF 579 KB 3/06
ProASIC3/E FlashROM (FROM)  PDF 204 KB 6/05
ProASIC3/E Security  PDF 128 KB 1/05
Using DDR for ProASIC3/E Devices  PDF 891 KB 1/05
ProASIC3/E SRAM/FIFO Blocks  PDF 571 KB 1/05
UJTAG Applications in ProASIC3/E Devices  PDF 104 KB 1/05
In-System Programming (ISP) in ProASIC3/E Using FlashPro3  PDF 110 KB 1/05
Using ProASIC3/E RAM as Multipliers  PDF 414 KB 3/05
Using ProASIC3/E FIFO for Generating Periodic Waveforms Technical Brief  PDF 77 KB 1/05
Embedded SRAM Initialization Using External Serial EEPROM  PDF 96 KB 1/05
Designing a MIL-STD-1553 System Using Core1553 and Core8051 
VHDL: Verilog:
PDF 139 KB 4/05
Programming a ProASIC3/E Using a Microprocessor  PDF 52 KB 1/05
Using Global Resources in Actel ProASIC3/E Devices  PDF 341 KB 7/05

 

Product Briefs:

CoreMP7:

  CoreMP7 Product Brief  PDF 87 KB 4/06

Fusion:

  Fusion Product Brief  PDF 143 KB 4/06

ProASIC3/E:

ProASIC3 Product Brief  PDF 140 KB 4/06
ProASIC3E Product Brief  PDF 124 KB 4/06

 

White Papers:

ARM7:

Bringing ARM7TM to the Masses  PDF 124 KB 4/06

Fusion:

Fusion Technology White Paper  PDF 580 KB 4/06

ProASIC3/E:

ProASIC3/E Production FPGAs Features and Advantages White Paper  PDF 280 KB 3/05
Flash FPGAs in the Value-Based Market White Paper  PDF 66 KB 1/05

 

Product Information Brochures (PIB):

CoreMP7:

  CoreMP7 Brochure  PDF 332 KB 4/06

ARM-ready Development Tools:

CoreConsole Brochure  PDF 226 KB 4/06

Fusion:

  Fusion Brochure  PDF 896 KB 4/06
Live at Power-Up Brochure  PDF 744 KB 6/05

ProASIC3/E:

The Importance of Design Security Brochure  PDF 248 KB 4/05
Total System Cost Brochure  PDF 404 KB 10/05
Total System Power Brochure  PDF 1.2 MB 2/05
Single-Event Effects in FPGAs  PDF 307 KB 3/05
ProASIC3/E Brochure  PDF 1.4 MB 1/06
  ProASIC3 Starter Kit Brochure  PDF 410 KB 3/06
FlashPro Programmers Brochure  PDF 336 KB 12/05

 

User's Guides & Manuals:

CoreConsole:

CoreConsole User's Guide  PDF 1.3 MB 4/06

CoreMP7:

CoreMP7 Quick Start User's Guide  PDF 1.3 MB 4/06
CoreMP7 Subsystem User's Guide  PDF 451 KB 1/06
CoreMP7 User's Guide  PDF 853 KB 4/06